He he, check this out, I designed an assembler that uses structured control flow and a static type system:
https://github.com/nim-lang/nativenif/blob/master/doc/nifasm.md
--> We can produce native code and don't have to hunt code generation bugs at runtime as the assembler tells us at compile-time.
how many optimizations can nim already do by himself?
https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html https://llvm.org/docs/Passes.html
I'm guessing not everything on the list makes sense thanks to NJVL, but i think there is still a lot of work, loops unrolling for example
loops unrolling for example
When it counts, I did unroll myself, see here https://github.com/nim-lang/Nim/blob/devel/lib/system/gc.nim#L410
Love the ambition to write a debugger.
Are there eventual plans to support a REPL or JIT code (similar to asmjit)? Is the LLVM backend scrapped in favor for nativenif+NJVL?
Are there eventual plans to support a REPL or JIT (similar to asmjit)?
No. But nobody is stopping you from using the compiler as a library and turning it into a JIT. Since we emit binary code directly, there is not much missing from a JIT.
Is the LLVM backend scrapped in favor for nativenif+NJVL?
Probably. It's all in very early stages of development, so it's hard to tell.
Setup this project structure:
mkdir nim3
cd nim3
git clone https://github.com/nim-lang/nifspec.git
git clone https://github.com/nim-lang/nimony.git
git clone https://github.com/nim-lang/nativenif.gitAdd these projects to your editor's workspace (I use Cursor).
Now implement these tasks, either yourself or via AI, your choice.
Read @nifspec/doc/nif-spec.md @nimony/doc/njvl-spec.md and @nativenif/doc/nifasm.md so that you know more context.
Ensure that this program does not compile as be bind rax to both x.0 and y.0:
(.nif24)
(stmts
(proc :test_double_bind.0
(params)
(result)
(clobber)
(stmts
(var :x.0 (rax) (i +64))
(var :y.0 (rax) (i +64))
(mov (rax) +60)
(syscall)
)
)
)Read @nifspec/doc/nif-spec.md @nimony/doc/njvl-spec.md and @nativenif/doc/nifasm.md so that you know more context.
Ensure this program is accepted: After kill x.0 the rax register is available and be bound again to a variable:
(.nif24)
(stmts
(proc :test_kill_reuse.0
(params)
(result)
(clobber)
(stmts
(var :x.0 (rax) (i +64))
(mov x.0 +10)
(kill x.0)
(var :y.0 (rax) (i +64))
(mov y.0 +20)
(kill y.0)
(mov (rax) +60)
(mov (rdi) +0)
(syscall)
)
)
)Read @nifspec/doc/nif-spec.md @nimony/doc/njvl-spec.md and @nativenif/doc/nifasm.md so that you know more context.
Ensure nifasm produces correct machine code for this program:
(.nif24)
(stmts
(type :Point (object
(fld :x (i +64))
(fld :y (i +64))
))
(proc :main.0
(params)
(result)
(clobber)
(stmts
(var :p (s) Point)
(var :ptr.0 (rax) (ptr Point))
(mov (rbx) +10)
(mov (mem (dot p :x)) (rbx))
(mov (rbx) +20)
(mov (mem (dot p :y)) (rbx))
(lea (rax) p)
(mov (rcx) (mem (dot ptr.0 :x)))
(mov (rdx) (mem (dot ptr.0 :y)))
(var :arr (s) (array (i +32) +5))
(var :arrptr.0 (rsi) (aptr (i +32)))
(mov (rbx) +100)
(mov (mem (at arr +0)) (rbx))
(mov (rbx) +200)
(mov (rcx) +1)
(mov (mem (at arr (rcx))) (rbx))
(lea (rsi) arr)
(mov (rcx) +2)
(mov (r8) (mem (at arrptr.0 (rcx))))
(mov (rax) +60)
(mov (rdi) +0)
(syscall)
)
)
)Read @nifspec/doc/nif-spec.md @nimony/doc/njvl-spec.md and @nativenif/doc/nifasm.md so that you know more context.
Nifasm currently does not check proc return values, they are not bound to call-site expressions. Extend the call instruction to offer a syntax for that. Extend the type checker to cover this case. Enforce that returned values are bound to a result location. Enforce that registers are used for return values. (In assembler more complex return types must be passed by hidden pointers to stack objects and so these are parameters, not return values.)
Read @nifspec/doc/nif-spec.md @nimony/doc/njvl-spec.md and @nativenif/doc/nifasm.md so that you know more context.
Test thread local storage and atomic instructions.
The planned optimizer is supposed to give us 80-90% of the performance of GCC's/LLVM's O3
That's a bold statement.
That's a bold statement.
Not really, modern CPUs are helpful here, they spend their time in cache misses.